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Frame Format in 8 ? bit Mode
The frame format is identical to the 10-bit mode. Sync and
data word depth is reduced to eight bits. Synchronization
Words
Frame Synchronization for 10-Bit Mode
Table 27 shows the structure of the frame synchronization
code. Note that the table shows the default data word
(configurable) for 10-bit mode. If more than one window is
active at the same time, the sync channel transmits the frame
synchronization codes of the window with highest index
only.
Table 27. FRAME SYNCHRONIZATION CODE DETAILS FOR 10-BIT MODE
Sync Word Bit
Register
Default
Position
9:7
9:7
9:7
9:7
6:0
Address
N/A
N/A
N/A
N/A
131[6:0]
Value
0x5
0x6
0x1
0x2
0x2A
Description
Frame start indication
Frame end indication
Line start indication
Line end indication
These bits indicate that the received sync word is a frame synchronization code. The value
is programmable by a register setting
Window Identification
Frame synchronization codes are always followed by a
5-bit window identification (bits 4:0). This is an integer
number, ranging from 0 to 31, indicating the active window.
If more than one window is active for the current cycle, the
highest window ID is transmitted.
Data Classification Codes
For the remaining cycles, the sync channel indicates the
type of data sent through the data links: black pixel data
(BL), image data (IMG), or training pattern (TR). These
codes are programmable by a register setting. The default
values are listed in Table 28.
Table 28. SYNCHRONIZATION CHANNEL DEFAULT IDENTIFICATION CODE VALUES FOR 10-BIT MODE
Sync Word Bit
Register
Default
Position
9:0
9:0
9:0
9:0
Address
132 [9:0]
133 [9:0]
134 [9:0]
135 [9:0]
Value
0x015
0x035
0x059
0x3A6
Description
Black pixel data (BL). This data is not part of the image. The black pixel data is used in-
ternally to correct channel offsets.
Valid pixel data (IMG). The data on the data output channels is valid pixel data (part of the
image).
CRC value. The data on the data output channels is the CRC code of the finished image
data line.
Training pattern (TR). The sync channel sends out the training pattern which can be pro-
grammed by a register setting.
Frame Synchronization in 8-bit Mode
The frame synchronization words are configured using
the same registers as in 10-bit mode. The two least
significant bits of these configuration registers are ignored
and not sent out. Table 29 shows the structure of the frame
synchronization code, together with the default value, as
specified in SPI registers. The same restriction for
overlapping windows applies in 8-bit mode.
Table 29. FRAME SYNCHRONIZATION CODE DETAILS FOR 8-BIT MODE
Sync Word Bit
Register
Default
Position
7:5
7:5
7:5
7:5
4:0
Address
N/A
N/A
N/A
N/A
[6:2]
Value
0x5
0x6
0x1
0x2
0x0A
Description
Frame start (FS) indication
Frame end (FE) indication
Line start (LS) indication
Line end (LE) indication
These bits indicate that the received sync word is a frame synchronization code. The
value is programmable by a register setting.
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